Wednesday August 6, 2014
IBM BTV Main Site Cafeteria
12:30 – 1:00 PM Meet and Greet
1:00 – 2:00 PM Seminar
Prof. Hossein Hasemi
Associate Professor of Electrical Engineering
Ming Hsieh Faculty Fellow
University of Southern California, Los Angeles CA
Advancements in semiconductor technology has led to monolithic realization of complex Radio Frequency (RF) Integrated Circuits (IC) and System-On-a-Chip (SOC) for commercial wireless communications. Shannon’s capacity theorem states that the communication data-rate is proportional to the information bandwidth and the logarithm of Signal-to-Noise-plus-Interference Ratio (SNIR). Wireless transceivers operating at higher carrier frequencies have access to larger bandwidth and enable more compact realization (due to smaller wavelength). Antenna arrays can improve the SNIR by dynamically focusing the transmit power towards the desired directions (beam forming), reducing the interferences through spatial filtering, and improving the receiver sensitivity. Antenna arrays have been around for over half a century in high performance military radar and communication systems in the context of phased arrays. Recent research, about a decade old, has demonstrated monolithic realization of antenna array transceivers in silicon processes, and compact packaged solutions with antenna arrays, for commercial applications such as reliable ultra-high-speed wireless communications at 24 and 60 GHz Industrial Scientific Medical (ISM) bands, low-cost automotive radars at 24 GHz and 77 GHz bands, Ultra-Wide Band (UWB) imaging systems in the 3 – 10 GHz band, and passive imaging for security and healthcare applications at 94 GHz and 120 GHz bands. Current research efforts include realization of compact low-power antenna array systems at mm-wave and sub-mm-waves with higher performance and more sophistication, e.g., including on-chip Built-In Self-Test (BIST), calibration, and integration with the Digital Signal Processing (DSP) core. This talk covers the basics of multi-antenna systems, narrowband phased arrays, wideband timed arrays, transceiver architectures, circuit building blocks, and several case studies spanning 1 – 100 GHz for various applications.
Hossein Hashemi is an Associate Professor of Engineering, Ming Hsieh Faculty Fellow, and the co-director of the Ming Hsieh Institute and the Ultimate Radio Laboratory (UltRa-Lab) at the University of Southern California. He received the B.S. and M.S. degrees in Electronics Engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in Electrical Engineering from the California Institute of Technology, Pasadena, in 2001 and 2003, respectively. Dr. Hashemi currently serves on the Technical Program Committees of IEEE International Solid-State Circuits Conference (ISSCC), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, and the IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS). He is also an Associate Editor for the IEEE Journal of Solid state Circuits (2013 – present), and Guest Editor of the same journal for October 2013 and December 2013 issues. He was an Associate Editor for the IEEE Transactions on Circuits and Systems—Part I: Regular Papers (2006–2007) and an Associate Editor for the IEEE Transactions on Circuits and Systems—Part II: Express Briefs (2004–2005). He was the recipient of the 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award and the National Science Foundation (NSF) CAREER Award. He received the USC Viterbi School of Engineering Junior Faculty Research Award in 2008, and was recognized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage in 2011. He was a co-recipient of the 2004 IEEE Journal of Solid-State Circuits Best Paper Award for “A Fully-Integrated 24 GHz 8-Element Phased-Array Receiver in Silicon” and the 2007 IEEE International Solid-State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper for “A Fully Integrated 24 GHz 4-Channel Phased-Array Transceiver in 0.13um CMOS based on a Variable Phase Ring Oscillator and PLL Architecture”. He is the co-editor of the book “Millimeter-Wave Silicon Technology: 60 GHz and Beyond” published by Springer in 2008.