IEEE Phoenix Section

Including Northern Arizona

IEEE
September 15th, 2016

SusTech 2016 invites undergraduate students to submit abstracts for the Student Poster Contest.

Students are invited to send in ideas or designs for developing projects/products supporting the sustainability topics areas of the Conference. The selected posters will be displayed during the SusTech 2016 Student Poster Session, on Sunday October 9, being held in Phoenix, Arizona, USA.

The deadline to submit poster abstractscall-for-abstracts-poster-sustech-2016 is midnight US Mountain Time, September 23,2016.

Notification of acceptance will be sent out within two days of submission.

WHO CAN PARTICIPATE?

Poster authors must be undergraduate or graduate students at the time of submission and may be members of a team comprising of up to four students. At least one student author must be an IEEE student member at the time of the submission of the poster to the Contest. The poster should be fully the work of the student or students and completed before they have received their respective engineering or scientific degree.

TOPICS OF INTEREST

  • Internet of Things – IOT (e.g.: Sensors, computing, control, communication, storage and drive electronics targeted for IOT applications, medical electronics, drones)
  • Smart Grid (e.g. communication, control, power electronics, energy storage, demand control and response)
  • Waste: (e.g. reduction, conversion, disposal, recycling, reuse, harvesting, managing product lifecycle)
  • Renewable Energy (e.g. solar, wind, tidal, fuel cells, energy harvesting, nuclear, thermal, power distribution)
  • Water (e.g. Sourcing & distribution, conservation, harvesting, waste disposal, recycling)
  • Electronics (e.g. components and systems, sustainable manufacturing, automotive and industrial applications)
  • Energy Efficiency (e.g. sensing and measurement, energy saving, auto electrification & fuel economy, data centers)
  • Transportation (e.g. electric & autonomous vehicles, aviation, motors, drive controls, batteries)
  • Societal Implications / Quality of Life (e.g. global warming, sustainability education, human resources, risk-management, remediation, public policy)

HOW TO SUBMIT?

To participate in the contest students should write a 2-page (500-700-word) description (abstract) of the poster, along with authors names, respective university and contact details; and submit it using the SusTech website (include hyperlink here once weblink is created) by the specified deadline. The abstracts will be reviewed and authors notified by Sept 20th if they will be presenting at SusTech. If you have any questions or problems submitting your abstract, please contact session chairs Dr. Phani Vallabhajosyula, and Prof Michael Goryll at phani.c.v@ieee.org and michael.goryll@asu.edu. Contestants will need to prepare a poster of no larger than 48 x 36 inches and on a tri-fold board.

 

Key Dates Sept. 23, 2016 Submission deadline for poster abstract
Abstract Submission date + 2days Notification of Acceptance
Oct. 9, 2016 Final Poster Display During Conference

 PRIZES

Cash prizes will be awarded for first, second and third places as determined by the judges. First place $750; second $500; third $250. Information on the winners will be posted on the SusTech and IEEE Region 6 websites.

RULES REGARDING SUBMISSIONS

  1. Poster authors must be undergraduate or graduate students at the time of submission and may be members of a team comprising of up to four students.
  2. At least one student author must be an IEEE student member at the time of the submission of the poster to the Contest.
  3. The poster should be fully the work of the student or students and completed before they have received their engineering or scientific degree.
  4. The poster abstract should not be previously published or presented at another conference which has assigned copyright. If any plagiarism or copyright issues are found for the abstract, it will not be accepted.
  5. Poster abstracts must be submitted by the deadline. Abstracts submitted afterward will not be considered for evaluation.
  6. The organizing/review committee of the SusTech 2016 Student Poster Contest reserves the right to accept or reject any abstract without assigning any reason.

POSTER SPECIFICATIONS

  1. Posters must be tri-fold and may be no larger than 36”x48”
  2. Posters will be placed to stand alone on the tables

POSTER SESSION SCHEDULE AND SET UP FOR CONTESTANT

  1. Set up begins at 2:30 pm. At least one of the authoring students must be present at the SusTech Conference.
  2. Poster boards will be numbered.  Presenters should attach their posters to the board number corresponding to the number assigned to their poster.
  3. Judging will occur from 5:30-6:00pm.
  4. Poster session is open 3:00 pm – 7:00 pm.
  5. Take down by presenters no later than 7:10 pm.  Posters not removed by 7:10 pm will be taken to the Registration area.
  6. If selected as one of the winning posters, you will receive a ribbon on your poster and will also be notified via email.
  7. The SusTech Conference may request that prize posters be held temporarily for public display.

September 14th, 2016

The September 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.


September 8th, 2016

Tuesday, September 20th, 2016 at 5:30 PM

 On-Chip Embedded Cooling of Power and Logic Components

 Avram Bar-Cohen*, PhD – IEEE/CPMT Distinguished Lecturer

Principal Engineering Fellow, Raytheon Corporation – Sape & Airborne Systems, Rosslyn, Virginia,

abc@umd.edu

(*on Leave fromUniversity of Maryland, College Park, Maryland, USA)

 ABSTRACTieee-phoenix-section-cpmt-society-chapter-september-20

Thermal packaging technology has been a key enabler in the development of today’s microelectronic systems, including smart phones, tablet computers, back-room data-crunching supercomputers, and the navigation systems that have come to define our lives in the 21st Century. Much of the benefit that we derive from miniaturization, higher performance, lower cost and greater reliability of these quintessential 21st Century “widgets,” can be traced to improvements in thermal technology, thermal modeling, and the integration of thermal management principles and techniques into electronic product development.

A review of thermal packaging over the first 70 years of the Information Age will reveal a relentless “inward migration” of cooling technology from room ventilation and air-conditioning, to cabinet cooling, to component cooling with heat sinks and cold plates, and to today’s efforts to address on-chip hot spots and near-junction thermal transport. Attention will then be devoted to current thermal management requirements, driven by nano-electronics, which confront packaging engineers with the simultaneous “triple threat” of high-power, “hotspots,” and 3D integration in applications as diverse as high performance computing, power electronics, and RF systems. The lecture will close with a review of 3rd-generation thermal management technologies relying on intra- and interchip microfluidic cooling, use of diamond substrates, and on-chip thermoelectric coolers to implement the emerging “embedded cooling” paradigm. 

Date:           Tuesday, September 20th, 2016

Location:    Constellation Room, NXP Semiconductors, Discovery Business Center, 2108 E. Elliot Road, Tempe, Arizona..

Note New Address – Park on east side of campus – New main entrance on south side facing Elliot Road

Sign in at the security station to obtain visitor pass BEFORE 5:45 PM. Present Valid Photo ID.

You will be escorted to the meeting room. Within the building you should always be escorted..

Agenda:     5:30–6:00 PM: Social/Refreshments, 6:00–7:00 PM: Presentation, 7:00 PM: Dinner

(Pizza and Soda will be provided by the IEEE Phoenix Section CPMT Society Chapter)

IEEE members and non-members are all welcome to attend. The presentation promptly starts at 6:00 PM.


August 15th, 2016

IEEE Phoenix Section CPMT Society Chapter – August 17, 2016 Meeting – Dr. Katsuyuki Sakuma

 Dr. Katsuyuki Sakuma

Research Staff Member, IBM T.J. Watson Research Center

ABSTRACT

3D IC integration technology and large die packaging are essential ingredients for further performance enhancement of main frame and super-computer applications, but warpage of large and thin interposers is one of the biggest challenges in achieving large die 3D IC integration. In addition to that, a micro-bump pitch for 3D application is becoming smaller in order to achieve higher bandwidth I/Os, hence removal of flux residue becomes more difficult. To eliminate the use of flux and its associated cleaning process during flip chip bonding, a micro-scrub thermo-compression (TC) bonding process was evaluated as a potential bonding method. We also demonstrated a successful bonding process for large die 3D IC integration with 22 nm ULK CMOS technology by developing an enhanced TC bonding process that addresses problems caused by interposer and laminate warpage. Both TC bonding technologies will be discussed.

Wednesday, August 17th, 2016 at 5:30 PM


August 14th, 2016

The August 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.


July 9th, 2016

The July 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.


June 8th, 2016

The June 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.


June 5th, 2016

Understanding the Optical, Thermal, and Electrical Performances of LED and their Relationship to Efficiency of Solid-State Lighting

 Prof. Shi-Wei Ricky Lee, FIEEE, FASME, FIMAPS, FInstP

Professor of Mechanical & Aerospace Engineering, HKUST

Director of Center for Advanced Microsystems Packaging

Director of HKUST LED-FPD Technology R&D Center at Foshan

Senior Past-President of IEEE Components, Packaging and Manufacturing Technology Society

rickylee@ust.hk

 ABSTRACT

WYSIWYG (what you see is what you get) is an acronym in computer engineering to indicate the technology for matching the edited documents viewed on the monitor screen and its hardcopies in a printed format. In this presentation, I would like to illustrate a similar concept in LED packaging for solid-state lighting (SSL). LED has been claimed as the 4th generation light source which has the major merits of rather low power consumption and very long service life. Typical specifications include 150 lm/W and 50000 hours for luminous efficacy and operating life, respectively. However, it appears that not all people understand what these specifications refer to and imply. As a result, inappropriate expectation may occur due to misperception. In other words, what you see may not be what you thought. Consequently, such misunderstanding may hinder the propagation of LED for SSL. In this presentation, the essence in LED packaging to achieve WYSIWYT (what you see is what you thought) for SSL will be reviewed. Various topics on efficiencies and their corresponding loss channels at the LED package and luminaire levels will be discussed. Emphasis will be placed on the trends of LED packaging in order to achieve the intended performance.

BIOGRAPHY

Ricky Lee received his PhD degree from Purdue University in 1992. He joined the Hong Kong University of Science & Technology (HKUST) in 1993. During his career of tenure-track faculty at HKUST, Dr Lee once was on secondment to serve as Chief Technology Officer of Nano & Advanced Materials Institute (NAMI) for two and a half years. Currently Dr Lee is Professor of Mechanical Engineering and Director of Center for Advanced Microsystems Packaging (CAMP) at HKUST. He also has a concurrent appointment as Director of HKUST LED-FPD Technology R&D Center at Foshan, Guangdong, China. Due to his technical contributions, Dr Lee received many honors and awards over the years. In addition to being the recipient of 12 best/outstanding paper awards and 5 major professional society awards, Dr Lee is Life Fellow of ASME and IMAPS, and Fellow of IEEE and Institute of Physics (UK). He is also a Distinguished Lecturer and the Senior Past-President of the IEEE Components, Packaging, and Manufacturing Technology (CPMT) Society.

Date:             Monday, June 6th, 2016

Location:       Constellation Room, NXP Semiconductors, Discovery Business Center, 2108 E. Elliot Rd. Tempe, AZ.

                     Note New Address – Park on east side of campus – New main entrance on south side facing Elliot. 

                     Sign in at the security station to obtain visitor pass (Photo ID required) BEFORE 6:00 PM

You will be escorted to the meeting room. Please arrive at the entrance no later than 5:45 PM.

Agenda:        5:30–6:00 PM: Social/Refreshments, 6:00–7:00 PM: Presentation, 7:00 PM: Dinner

                     The presentation promptly starts at 6:00 PM.

(Pizza and Soda will be provided by the IEEE Phoenix Section CPMT Society Chapter)

IEEE members and non-members are all welcome to attend.

IEEE Phoenix Section CPMT Society Chapter – June 6, 2016 Meeting – Prof. Ricky S.W. Lee


May 13th, 2016

The May 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.


April 6th, 2016

The April 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.