IEEE Phoenix Section

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Archive for August, 2016

IEEE-CPMT Society, Phoenix Chapter Meeting, August 17, 2016

Monday, August 15th, 2016

IEEE Phoenix Section CPMT Society Chapter – August 17, 2016 Meeting – Dr. Katsuyuki Sakuma

 Dr. Katsuyuki Sakuma

Research Staff Member, IBM T.J. Watson Research Center

ABSTRACT

3D IC integration technology and large die packaging are essential ingredients for further performance enhancement of main frame and super-computer applications, but warpage of large and thin interposers is one of the biggest challenges in achieving large die 3D IC integration. In addition to that, a micro-bump pitch for 3D application is becoming smaller in order to achieve higher bandwidth I/Os, hence removal of flux residue becomes more difficult. To eliminate the use of flux and its associated cleaning process during flip chip bonding, a micro-scrub thermo-compression (TC) bonding process was evaluated as a potential bonding method. We also demonstrated a successful bonding process for large die 3D IC integration with 22 nm ULK CMOS technology by developing an enhanced TC bonding process that addresses problems caused by interposer and laminate warpage. Both TC bonding technologies will be discussed.

Wednesday, August 17th, 2016 at 5:30 PM

August 2016 Issue of Valley Megaphone

Sunday, August 14th, 2016

The August 2016 edition of the IEEE Phoenix Section newsletter “Valley  Megaphone” is now available.  The issue includes all the information regarding IEEE-Phoenix Section and its Society Chapters. Download the PDF version from the link right here. The current and older editions of the Megaphone can always be found here.