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Date: March 16th, 2015
EFLX: an FPGA IP core for SoCs

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Upcoming Events

The following schedule and location hold for most events, unless otherwise noted:

  • 6:30pm: Networking/Light Dinner
  • 7:00pm: Announcement
  • 7:05pm: Presentation
  • 8:15pm: Adjourn

Cost: Free. $2 donation accepted for food.

Location: QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara, CA

We would appreciate suggestions for speakers to present at our meetings in the future.

EFLX: an FPGA IP core for SoCs

Date: March 16th, 2015

Speaker: Dr. Cheng C. Wang, Flex Logix Technologies, Inc.


Abstract
Cheng C. Wang, VP of Engineering of Flex Logix Technologies, Inc, will present on their IP technology for an embedded FPGA core for your SoC. The physical IP is a full-functioned FPGA, ranging from 100 LUTs to more than 300K LUTs, currently offered for TSMC28HPM, but portable to any process in 2-3 months. This talk will highlight the award-winning EFLX FPGA technology, its specifications, software flow, and applications.

Bio
Cheng C. Wang received his B.S. in EECS with High Honors from University of California, Berkeley in 2005, his M.S. and Ph.D. in EE from University of California, Los Angeles in 2009 and 2013, respectively. He is the recipient of the 2013 Outstanding PhD Dissertation Award from UCLA Electrical Engineering and the 2014 Lewis Award for Outstanding Paper from ISSCC.



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