Santa Clara Valley-San Francisco Chapter of Electron Devices Society

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Welcome to Electron Devices Society–Santa Clara Valley/San Francisco Chapter

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Registration link: https://www.surveymonkey.com/r/RBRG6MC

Mapping emerging memory devices to various applications: SCM, machine learning, in-memory computing, and other

Chris Petti

Fellow, Western Digital Corp.

Tuesday, September 11, 2018 @ 6PM

Texas Instruments Conference Center
2900 Semiconductor Dr, Santa Clara, CA 95051

Cost to attend: FREE

Contact: Peter Rabkin, prabkin@yahoo.com

Agenda
6:00PM: Free Pizza
6:15PM: Talk

Abstract

Over the years, there have been many technological candidates for a so-called “universal memory” – something that could replace NAND-FLASH, NOR-FLASH, SRAM, DRAM, etc.  These technologies include many different types of resistive memory – oxide-based, conductive bridge, correlated electron, magnetic RAM, etc.  Lately, it has become clear that none of these technologies is adequate for all of the usual Von-Neumann-based applications: storage (both “cold” or “hot”), main memory, cache, and other registers.  Moreover, other, non-Von-Neumann based applications, including neural networks and in-memory computing, are being developed.  The objective of this talk is to create a map of the different types of memory cell technologies to different applications and architectures, and to discuss the device and technology parameters that are most important for this classification.

Speaker Biography

Christopher Petti is an Engineering Fellow and Senior Director of Advanced Technology Development at Western Digital.  He came to Western Digital as part of the acquisition of SanDisk in 2016.  Dr. Petti has over 25 years of experience in a variety of semiconductor industries, including non-volatile memory, logic and SRAM technologies, flat-panel displays, and solar cells.  In these fields, he has specialized in device physics, process integration, product architecture, and product engineering.  Dr. Petti holds a B.S. in Physics from the Massachusetts Institute of Technology, and an M.S. and Ph.D. in Electrical Engineering from Stanford University.  He is inventor or co-inventor on over 115 issued U.S. patents.

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