Santa Clara Valley-San Francisco Chapter of Electron Devices Society

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Welcome to Electron Devices Society–Santa Clara Valley/San Francisco Chapter

 

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Registration link: https://www.surveymonkey.com/r/8RLCD62

 

Special Event: IEEE EDS @ SJSU Technology Showcase

Saturday, May 19 , 2018

SJSU Student Union
211 S 9th St, San Jose, CA 95112

Free parking (code given by attendant) at SJSU North Parking Garage, 437 E San Fernando St. San Jose, CA 95112

Cost to attend: FREE

Agenda
8:30 ‐ 9:30: Free Continental Breakfast
9:00 ‐ 10:30: IEEE EDS Talk: “Emerging Interconnect Technologies for Nanoelectronics” by Prof. Krishna Saraswat, Department of Electrical Engineering, Stanford University
10:30 ‐ 12:30: SJSU Technology Showcase student project poster presentations
12:30 ‐ 2:30: Free Lunch/Panel Discussion

EDS Talk Abstract

Modern electronics has advanced at a tremendous pace over the course of the last half century primarily due to enhanced performance of MOS transistors due to dimension scaling, introduction of new materials and novel device structures. However, while this has enhanced the transistor performance, the opposite is true for the copper interconnects that link these transistors. Looking into the future the relentless scaling paradigm is threatened by the limits of copper/low-k interconnects, including excessive power dissipation, insufficient communication bandwidth, and signal latency for both off-chip and on- chip applications. Many of these obstacles stem from the physical limitations of copper/low-k electrical wires, namely the increase in copper resistivity, as wire dimensions and grain size become comparable to the bulk mean free path of electrons in copper and the dielectric capacitance. Thus, it is imperative to examine alternate interconnect schemes and explore possible advantages of novel potential candidates. This talk will address effects of scaling on the performance of Cu/low-k interconnects, alternate interconnect schemes: carbon nanotubes (CNT), graphene, optical interconnect, three-dimensional (3-D) integration and heterogeneous integration of these technologies on the silicon platform. Performance comparison of these technologies with Cu/low-k interconnects will be discussed. Prof. Saraswat is the is Rickey/Nielsen Chair Professor of Electrical Engineering at Stanford University.

 

SJSU Technology Showcase – student project topic areas
• Data Science (Data Mining/Machine Learning/Deep Learning)
• Smart City Apps and Technologies
• Blockchain
• Internet of Thing
• Embedded Systems/Robotics
• Enterprise App Development
• Cloud/Virtualization
• Cybersecurity
• Virtual and Augmented Reality
• ASIC/VLSI/Analog/Mixed-Signal Circuits
• Signal Processing
• Wireless Communications
• Smart Grid/Power Electronics/Control
• Electric Vehicles

 

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More information at the IEEE EDS Santa Clara Valley-San Francisco Chapter Home Page

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