Santa Clara Valley-San Francisco Chapter of Electron Devices Society

IEEE

Co-sponsored Events

July 2017
July 20th, 2017 Energy Efficient Computing in Nanoscale CMOS

Sponsored by: IEEE Santa Clara Valley Solid State Circuits Society, Co-sponsored by IEEE Electron Devices Society SCV Chapter

Time: July 20th, 2017, 6:00 PM to 8:00 PM

Speaker: Dr. Vivek De, Intel Fellow and Director of Circuit Technology Research at Intel Labs

Location: Texas Instruments Auditorium (Building E Visitor Center), 2900 Semiconductor Dr, Santa Clara, CA 95051

Seminar Program

October 2016
Nov 3rd, 2016 CPI stress induced carrier mobility shift in advanced silicon nodes Sponsored by: IEEE SCV Reliability Chapter, Co-sponsored by IEEE Electron Devices Society SCV Chapter

Time: Thursday, Nov 3, 2016,  6:00 PM to 8:00 PM

Speaker: Dr. Valeriy Sukharev, Technical Lead at the Design to Silicon Division (Calibre) of Mentor Graphics Corporation

Location:

Qualcomm Inc., 3165 Kifer Rd, Santa Clara, CA, 95051 (Meeting will be in the cafeteria, Building B)

Seminar Program

June 2016
June 21st, 2016 Transforming Nanodevices to Nanosystems Sponsored by: IEEE SF Bay Area Nanotechnology Council, Co-sponsored by IEEE Electron Devices Society SCV Chapter

Time: Tuesday, June  21st, 2016, 11:30 am- 1:00 pm

Speaker: Max M. Shulaker, Stanford University

Location:

Texas Instruments (TI) Auditorium E-1
2900 Semiconductor Drive
Santa Clara, CA

Seminar Program

May 2013
May 7th, 2013 Semiconductor Laser Reliability and Failure AnalysisSponsored by: IEEE Photonics Society Santa Clara Valley ChapterCo-sponsored by IEEE Electron Devices Society SCV Chapter and IEEE Reliability Society SCV Chapter

Time: Tuesday, May 7th, 2013, 6pm-8:30pm

 

Speaker: Dr. Robert W. Herrick, INTEL

 

Location:

Cogswell College (N.B. New Location–“Dragon’s Den” rm.)

1175 Bordeaux Dr, Sunnyvale, CA 94089

(Location: Between Moffett Park Drive and Java Drive)
Seminar Program

November 2012
Nov. 13, 2012 NanoMEMSSponsored by: IEEE San Francisco Bay Area Nanotechnology CouncilCo-sponsored by IEEE Electron Devices Society SCV Chapter

Time: Tuesday, November 13, 2012 Noon-1PM

 

Speaker: Dr. Héctor J. De Los Santos, NanoMEMS Research, LLC, Irvine, Ca

 

Location:

TI Auditorium E-1, 2900 Semiconductor Drive. Santa Clara
Seminar Program

October 2012
Oct. 25, 2012 Fourth Annual IEEE-SCV Soft Error Rate (SER) WorkshopSponsored by: Cisco Systems, Inc.and the CPMT, Electron Devices, and Reliability chapters of IEEE, Santa Clara Valley

Chair: Peng Su, Ph.D., Component Quality and Technology Group, Cisco Systems, Inc.

 

Program Chairs: Shi-Jie Wen and Rick Wong, Cisco Systems, Inc.
Location:

On the campus of Cisco Systems:

Building 15, First Floor (Sunken Treasures Conference Room), 3750 Cisco Way, San Jose

 

Also broadcast LIVE on the Internet, via WebEx (same registration procedure)

 

Cost: Free; Advance registration required
Workshop Program

Registration

 

IEEE Santa Clara Valley (SCV) Electron Devices Society (EDS) Annual Presentation: General Information & Membership Benefits

Please click here to view the presentation slides.