Jan 31, 2012

Short Course: Low Power Design Essentials

Speaker: Prof. Jan Rabaey

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Abstract: In this three hour short course, an overview of the basics as well as the more advanced techniques in low-power design will be discussed. In the first half, the fundamentals of low-power design will be analyzed and a number of well-established techniques will be reviewed. The second lecture will look forward in light of technology and application trends, and introduce a number of techniques to reduce energy even more aggressively over the next decade.

Biography – Jan M. Rabaey

Jan Rabaey received his Ph.D degree in applied sciences from the Katholieke Universiteit Leuven, Belgium. After being connected to UC Berkeley as a Visiting Research Engineer, he was a research manager at IMEC, Belgium. In 1987, he joined the faculty of the Electrical Engineering and Computer Science department of the University of California, Berkeley, where he now holds the Donald O. Pederson Distinguished Professorship. He is currently the scientific co-director of the Berkeley Wireless Research Center (BWRC), as well as the director of the FCRP Multiscale Systems Center (MuSyC).

He is the recipient of a wide range of awards, amongst which are IEEE Fellow, the 2008 IEEE CAS Society Mac Van Valkenburg Award, and the 2009 European Design Automation Association (EDAA) Lifetime Achievement award. In 2010, he was awarded the prestigious Semiconductor Industry Association (SIA) University Researcher Award.


Check in Time: 5.30 pm
Snacks and Networking: 5.30 pm -5.45 pm. Snacks will be provided.
Lecture: part 1: 5.45 pm – 6.45 pm,  part 2: 7.00 pm  -8.30pm
Venue: Texas Instruments Silicon Valley Auditorium, 2900 Semiconductor Dr., Santa Clara, CA 95051


to the Santa Clara Valley chapter of the Solid State Circuits Society


March 2018

Next Meeting

March 15, 2018

50 Years of Computer Architecture: From Mainframe CPUs to DNN TPUs and Open RISC-V, Prof. David Patterson, Google, Mountain View, CA, University of California, Berkeley, CA

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