SF Bay Area Nanotechnology Council

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Archive for January, 2013

CMOS Compatible Nanoscale Vacuum Tube

Saturday, January 19th, 2013

February 19, 2013 Noon – 1  pm
Texas Instruments (TI) Auditorium E-1
2900 Semiconductor Drive
Santa Clara, CA

 
TITLE: CMOS Compatible Nanoscale Vacuum Tube

SPEAKER: Dr. Jin-Woo Han, Research Scientist, NASA AMES Research Center

 

ABSTRACT:
Vacuum tubes had been the major workhorse in electronics before the commercial silicon transistor emerged in 1960’s. The vacuum tube performs rectifying and amplifying functions by utilizing the electrons movement through a free space. However, the vacuum tube is hard to integrate, heavy, fragile, and energy consuming. The solid-state transistor overcame these limitations because it is easy to integrate, light, reliable, and energy efficient. Compared to the vacuum tube, however, the transistor has low gain and is sensitive to noise and distortion as the carriers travel through silicon lattices. Therefore, the vacuum tubes are still used in a premier sound systems and baseband broadcasting stations.

A nanometer scale vacuum tube can provide the advantages of both vacuum tube and transistor. The nano vacuum tube can be fabricated and integrated with semiconductor process technology, providing compactness as well as high performance. Furthermore, while transistor operation in extreme conditions such as high temperature and radiation are problematic, the nano vacuum tube can operate well in these environments since it uses a vacuum channel. This implies that the nano vacuum tube might be exploited even for automobile and space applications. In this talk, the nanoscale vacuum transistor will be discussed.

SPEAKER BIOGRAPHY:
Jin-Woo Han is a Research Scientist at NASA Ames Research Center, California, where he is developing beyond-CMOS devices such as exploratory transistor/memory, THz devices, and sensors. His research experience includes overall research and development aspects from design, simulation, layout, process integration, fabrication, characterization, and modeling on multiple-gate MOSFET and unified memory devices. Currently, he is developing nanoscale vacuum channel transistors, paper electronic devices, and sensors for electronic nose.

He received IEEE EDS Early Career Award in 2012, Ames Honor Award from NASA in 2012, Best Dissertation Award from KAIST in 2010, and Gold Prize at Samsung humantech paper award from Samsung electronics in 2006. He authored or coauthored one book chapter, 60 peer-reviewed journal papers, and 30 conferences proceeding papers. He holds 14 patents.

He received the Ph. D. degree with highest honor from KAIST, Korea, in 2010.

AGENDA:

  • 11:30 am – Registration & light lunch (pizza & drinks)
  • Noon – Presentation & Questions/Answers
  • 1:00 pm - Adjourn
COST: IEEE Members: $5, Non-members:$10


 

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