Tutorials

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We’re pleased to give details about our seven Tutorials

SUMMARY: (Details below …)

“Teaching FPGA Image Processing with Remote-Lab and Video Lectures” (half-day morning: 9:00 AM – 12:30 PM)
Marco Winzker, Bonn-Rhein-Sieg University, Germany
Summary: This tutorial presents an FPGA remote-lab for image processing and low-power digital design that is available as an open educational resource. We will look at product development from algorithm to circuit implementation. Design experiments are introduced for investigating different tasks in this process.
Target audience of the tutorial are lecturers for digital design, microelectronics and signal processing and anybody who is interested in performing design experiment on FPGAs or experiencing modern educational technology.
Marco Winzker developed ASICs and FPGAs for several companies and is now professor for digital design at the Bonn-Rhein-Sieg University, Germany. He received a Fellowship for innovation in e-teaching in 2017, the IEEE William E. Sayle Award for Achievement in Education in 2015, and an IEEE Educon Best Paper Award 2012.

“Internet of Things (IoT): Signals, Applications, Challenges, and Demonstration” (half-day afternoon: 1:30 – 5:00 PM)
Ahmed Abdelgawad, Central Michigan University, USA
Summary: This tutorial aims to introduce the design and implementation of IoT signal processing systems. The foundations of IoT will be discussed throughout real applications. Challenges and constrains for the future research in IoT will be discussed. In addition, research opportunities and collaboration will be offered for the attendees.
Dr. Ahmed Abdelgawad received his M.S. and Ph.D. degree in Computer Engineering from University of Louisiana at Lafayette in 2007 and 2011 and subsequently joined IBM as a Design Aids & Automation Engineering Professional at Semiconductor Research and Development Center. In Fall 2012 he joined Central Michigan University as a Computer Engineering Assistant Professor, and is now a Computer Engineering Associate Professor. He is a senior member of IEEE. His area of expertise is distributed computing for Wireless Sensor Network (WSN), Internet of Things (IoT), Structural Health Monitoring (SHM), data fusion techniques for WSN, low power embedded system, video processing, digital signal processing, Robotics, RFID, Localization, VLSI, and FPGA design. He has published two books and more than 65 articles in related journals and conferences.


“Machine Learning Methods for Performance/Power/Thermal Optimization of Signal Processing Systems” (half-day morning: 9:00 AM – 12:30 PM)
Marilyn Wolf, Georgia Tech, USA; Shuvra Bhattacharyya, University of Maryland, USA
Summary: This tutorial will cover machine learning methods for use at both design time and run time. We will cover two major machine learning methods: convolutional neural networks (CNNs) and Markov models. Each has very different uses in signal processing systems, particularly for PPT characteristics. We will discuss efficient implementations of CNNs, including numerical representation, nonlinear function representations, and memory systems. Topics include: Introduction to convolutional neural networks: architecture, operation, classification, training; Implementation technologies for CNNs: CPU software, GPU and tensor processor, FPGA, ASIC; Required numerical precision for CNN arithmetic; Memory system requirements for CNNs.
We then discuss the use of Markov chains and Markov decision processes for signal processing systems, and design-time use of Markov decision processes (MDPs) to build run-time controllers with optimized policies., and methods for online optimization of Markov decision processes for incremental policy optimization. Topics include: Overview of Markov models and Markov decision processes; Algorithms to solve MDPs: value iteration, policy iteration; Hierarchical Markov decision processes; Using MDPs during design space exploration; Online training refinement for MDPs.
Marilyn Wolf is Farmer Distinguished Chair in Embedded Computing Systems and GRA Eminent Scholar at the Georgia Institute of Technology. She received her BS, MS, and PhD in electrical engineering from Stanford University in 1980, 1981, and 1984. She was with AT&T Bell Laboratories from 1984 to 1989 and was on the faculty of Princeton University from 1989 to 2007. Her research interests include cyber-physical systems, Internet-of-Things, embedded computing, embedded computer vision, and VLSI systems. She has received the ASEE Terman Award and IEEE Circuits and Systems Society Education Award. She is a Fellow of the IEEE and ACM.
Shuvra S. Bhattacharyya is a Professor in the Department of Electrical and Computer Engineering at the University of Maryland, College Park, and is a member of the Maryland Cybersecurity Center (MC2) and the University of Maryland Energy Research Center (UMERC). He is an author of six books and over 250 papers in the areas of signal processing, embedded systems, electronic design automation, wireless communication, and wireless sensor networks. He received the B.S. degree from the University of Wisconsin at Madison, and the Ph.D. degree from UC-Berkeley. Dr. Bhattacharyya has previously held industrial positions as a Researcher at the Hitachi America Semiconductor Research Laboratory and Compiler Developer at Kuck & Associates. He serves as co-Editor-in-Chief for the Journal of Signal Processing Systems.

“Introduction to Speech Coding with Internet of Things (IOT) Applications” (Full day: 9:00 AM – 5:00 PM)
Shivakumar Mathapathi, Dew Mobility, USA

“Algorithm/Architecture Co-design for Smart Signals and Systems in Cognitive Cloud/Edge” (half-day afternoon: 1:30 – 5:00 PM)
Chris (Gwo Giun) Lee, National Cheng Kung University, Taiwan
Summary: Niklaus Emil Wirth introduced the innovative idea that Programming = Algorithm + Data Structure. Inspired by this, we advance the concept to the next level by stating that Design = Algorithm + Architecture. With concurrent exploration of algorithm and architecture entitled Algorithm/Architecture Co-exploration (AAC), this methodology introduces a leading paradigm shift in advanced system design from System-on-a-Chip to Cloud and Edge.
As algorithms with high accuracy become exceedingly more complex and Edge/IoT generated data becomes increasingly bigger, flexible parallel/reconfigurable processing are crucial in the design of efficient signal processing systems having low power. Hence the analysis of algorithms and data for potential computing in parallel, efficient data storage and data transfer is crucial. With extension of AAC for SoC system designs to even more versatile platforms based on analytics architecture, system scope is readily extensible to cognitive cloud and reconfigurable edge computing for multimedia, a cross-level-of abstraction topic which will be introduced in this tutorial together with case studies.
Chris Gwo Giun Lee is an investigator in the field of signal processing systems including multimedia and bioinformatics. His endeavors in system design, based on analytics of algorithm concurrently with analytics architecture, has made possible computations on System-on-Chip and cloud platforms in resolving complex problems with both accuracy and efficiency. Having previously held leading and managerial positions in the industry such as System Architect in former Philips Semiconductor in Silicon Valley, Lee was recruited to NCKU in 2003 where he found and is currently directing the Bioinfotronics Research Center.
Lee received his B.S. degree in electrical engineering from National Taiwan University and both his M.S. and Ph.D. degrees in electrical engineering from University of Massachusetts. He has contributed more than 130 original research and technical publications with the invention of 100+ patents worldwide. Lee serves as the AE for IEEE TSP and Journal of Signal Processing Systems. He was formerly the AE for IEEE TCSVT for which he received the Best Associate Editor’s Award in 2011.

“Influence of Emerging Technologies on Power-Aware Cognitive Systems” (Full day: 9:00 AM – 5:00 PM)
Vijaykrishnan Narayanan, The Pennsylvania State University, USA; Kaushik Roy, Purdue University, USA; Suman Datta, University of Notre Dame, USA; Xueqing Li, Tsinghua University, China
Summary: A multitude of wearable and embedded cognitive signal processing are emerging. This tutorial will first introduce a video analytics system that assists visually impaired and a self-powered health-monitoring device in relating the new technologies to innovations in algorithms and application level optimizations. Using these systems, the rest of the tutorial will highlight the influence of new emerging architectural and device technologies in the design of intelligent signal-processing systems. The technologies discussed will include new memory and computational logic devices towards design of ultra-low power systems suitable for self-powered and battery-powered systems. The tutorial will also include the use of new computational paradigms, beyond Von Neumann architectures to match better with the computational model with new features of the novel devices. The speakers include three center directors of major interdisciplinary centers in the field.
Vijaykrishnan Narayanan received the B.S. degree from the University of Madras, Chennai, India, in 1993 and the Ph.D. degree in computer science and engineering from the University of South Florida, Tampa, FL, USA, in 1998. Prof. Narayanan is currently a Distinguished Professor with the Pennsylvania State University, University Park, PA, USA. His research interests include power- aware and reliable systems, embedded systems, nanoscale devices, and interactions with system architectures, reconfigurable systems, network-on-chips, and domain-specific computing. Prof. Narayanan was a recipient of several awards, including the Penn State Engineering Society Outstanding Research Award in 2006, the IEEE CAS VLSI Transactions Best Paper Award in 2002, the ACM Special Interest Group on Design Automation Outstanding New Faculty Award in 2000, the Upsilon Pi Epsilon Award for Academic Excellence in 1997, and the IEEE Computer Society Richard E. Merwin Award in 1996. He is a Fellow of the IEEE, and was the Editor-in-Chief of THE IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. Prof. Narayanan leads NSF Expeditions in Computing Center on Visual Cortex on Silicon.

“Advanced Baseband Processing Circuits and Systems for 5G Communications” (half-day afternoon: 1:30 – 5:00 PM)
Chuan Zhang and Xiaosi Tan, Southeast University, China
Summary: This tutorial focuses on Advanced Baseband Processing Circuits and Systems for 5G Communications: an emerging research field enabling 5G from theory to practice. By committing itself to the emerging techniques of baseband processing circuits and systems for 5G, this tutorial means to bring a synthesized source and wide view of recent progress and existing challenges in this particular but very important research area, including: 1) algorithm and code construction for 5G baseband processing; 2) algorithm and implementation co-design; 3) architecture and implementation optimization for 5G baseband; and 4) machine learning for baseband processing.
Chuan Zhang is now an associate professor at the National Mobile Communications Research Laboratory, School of Information Science and Engineering, Southeast University, Nanjing, China. He received B.E. degree (summa cum laude) in microelectronics and M.E. degree (summa cum laude) in VLSI design from Nanjing University, Nanjing, China, in 2006 and 2009, respectively. He received both M.S.E.E. degree and Ph.D. degree in Department of Electrical and Computer Engineering, University of Minnesota, Twin Cities (UMN), USA, in 2012. His current research interests include low-power high-speed VLSI design for digital signal processing and digital communication, bio-chemical computation and neuromorphic engineering, and quantum communication. Dr. Zhang is a member of Seasonal School of Signal Processing (S3P) and Design and Implementation of Signal Processing Systems (DISPS) TC of the IEEE Signal Processing Society; Circuits and Systems for Communications (CASCOM) TC, VLSI Systems and Applications (VSA) TC, and Digital Signal Processing (DSP) TC of IEEE Circuits and Systems Society. He serves as the Secretary of the 7th Committee on Science and Technology – Information Division, Ministry of Education, China.
Dr. Zhang received the Leike Excellence in Teaching Award of Southeast University in 2016, the Qingyun Sun Excellence in Teaching Award of Southeast University in 2017, and the University-Wide Excellence in Teaching Award of Southeast University in 2017. He is a (co-)recipient of Best Paper Award of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) in 2016, Best (Student) Paper Award of IEEE International Conference on Digital Signal Processing (DSP) in 2016, (three) Excellent Paper Awards and Excellent Poster Presentation Award of International collaboration Symposium on Information Production and Systems (ISIPS) in 2016 and 2017, (two) Best (Student) Paper Awards of IEEE International Conference on ASIC (ASICON) in 2015 and 2017, the Best Paper Award Nomination of IEEE Workshop on Signal Processing Systems (SiPS) in 2015, Excellent Master Dissertation Nomination of the Chinese Institute of Electronics in 2017, Excellent Master Dissertation Award of Jiangsu Province in 2009, (three) Excellent Bachelor Dissertation Award of Jiangsu Province in 2015 and 2016, (seven) Excellent Bachelor Dissertation Award of Southeast University in 2015 and 2016, (two) Excellent Bachelor Dissertation Award of Nanjing University in 2015 and 2016, the Merit (Student) Paper Award of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) in 2008.