IEEE Transactions on Nanotechnology
June 15th, 2017

Article in Focus from the May 2017 issue of IEEE Transactions on Nanotechnology


Crossbar-Based Memristive Logic-in-Memory Architecture

by Georgios Papandroulidakis ; Ioannis Vourkas ; Angel Abusleme ; Georgios Ch. Sirakoulis ; Antonio Rubio
T-NANO, Vol. 16, Issue 3, pp. 491 – 501, May 2017.

Abstract: The use of memristors and resistive random access memory (ReRAM) technology to perform logic computations, has drawn considerable attention from researchers in recent years. However, the topological aspects of the underlying ReRAM architecture and its organization have received less attention, as the focus has mainly been on device-specific properties for functionally complete logic gates through conditional switching in ReRAM circuits. A careful investigation and optimization of the target geometry is thus highly desirable for the implementation of logic-in-memory architectures. In this paper, we propose a crossbar-based in-memory parallel processing system in which, through the heterogeneity of the resistive cross-point devices, we achieve local information processing in a state-of-the-art ReRAM crossbar architecture with vertical group-accessed transistors as cross-point selector devices. We primarily focus on the array organization, information storage, and processing flow, while proposing a novel geometry for the cross-point selection lines to mitigate current sneak-paths during an arbitrary number of possible parallel logic computations. We prove the proper functioning and potential capabilities of the proposed architecture through SPICE-level circuit simulations of half-adder and sum-of-products logic functions. We compare certain features of the proposed logic-in-memory approach with another work of the literature, and present an analysis of circuit resources, integration density, and logic computation parallelism.

May 29th, 2017

Thematic Issue: “Letters: Micro/Nanosystems Mechanobiology”

The “Letters” in IEEE Transactions on Nanotechnology (TNANO) will devote a themed issue “Micro/Nanosystems Mechanobiology” to a collection of papers highlighting research and technology development in micro/nano-engineered systems for mechanobiology. The capabilities of cells to sense and respond to biomechanical cues in the cell microenvironment, including matrix stiffness, topography, fluidic flow, external forces, etc., play critical roles in various physiological and pathological processes. The understanding of the mechanosensing mechanisms at the cellular and molecular levels requires the development of novel micro- and nano-scale systems to interact with mechanosensing machineries in cells. Areas of interest include but are not limited to:

  • Micro/nanofabricated devices for cell/molecular mechanics
  • Biochips and bio-MEMS
  • Microfluidics
  • Surface nanotopography
  • Molecular sensors for force measurement
  • Cell-matrix interactions
  • Engineered tumor microenvironment
  • Cell adhesion, migration, and contraction
  • Cell membrane mechanics
  • Cell-nanoparticles interactions
  • Constitutive and computational modeling of cells and biomolecules


Submissions are solicited from researchers in the field for short reports of original research and perspectives and mini-reviews on emerging topics for this themed issue. Papers submitted to the “Letters” are limited to a maximum of 4 journal pages in the two-column IEEE format, which includes figures, tables, and references. Manuscripts will be subject to the same competitive and constructive peer-review criteria of TNANO with no article publishing charges.

The “Letters” in TNANO serves as forum for rapid publication of high-quality articles – featuring the topics of great current interest in all areas of nanotechnology. The submission to publication time is expected to be approximately six weeks. Accepted papers are published on the web in IEEE Xplore as soon as they are submitted in final form. Web-published papers have a DOI (Digital Object Identifier), and are fully citable and downloadable.

Follow the guideline (), and submit your paper to ScholarOne ManuscriptsTM at , indicating in the cover letter that you wish the paper to be considered for the Special Issue “Letters: Nano/Micro Engineered and Molecular Systems”. Note that the submitted article cannot be a verbatim copy of a published conference article and your manuscript must contain at least 30% new results when compared with conference papers.

Submission deadline: July 31, 2017
Anticipated publication: September 2017

Please address all other correspondence regarding this special issue to the Guest Editors:

Yubing Sun, Ph.D.
Assistant Professor, Mechanical and Industrial Engineering, University of Massachusetts-Amherst

Deok-Ho Kim, Ph.D.
Assistant Professor, Bioengineering, University of Washington-Seattle

Pak Kin Wong, Ph.D.
Professor, Biomedical Engineering, Penn State University

April 12th, 2017

From the January 2017 issue of IEEE Transactions on Nanotechnology

Negative Capacitance for Boosting Tunnel FET performance

by Masaharu Kobayashi ; Kyungmin Jang ; Nozomu Ueyama ; Toshiro Hiramoto
T-NANO, Vol. 16, Issue 2, pp. 253 – 258, January 2017.


Abstract: We have proposed and investigated a super steep subthreshold slope transistor by introducing negative capacitance of a ferroelectric HfO2 gate insulator to a vertical tunnel FET for energy efficient computing. The channel structure and gate insulator are systematically designed to maximize the Ion/Ioff ratio. The simulation study reveals that the electric field at the tunnel junction can be effectively enhanced by potential amplification due to the negative capacitance. The enhanced electric field increases the band-to-band tunneling rate and Ion/Ioff ratio, which results in 10x higher energy efficiency than in tunnel FET.

March 16th, 2017

From the January 2017 issue of IEEE Transactions on Nanotechnology

Mechanical Properties Tunability of Three-Dimensional Polymeric Structures in Two-Photon Lithography

by Enrico Domenico Lemma; Francesco Rizzi; Tommaso Dattoma; Barbara Spagnolo; Leonardo Sileo; Antonio Qualtieri; Massimo De Vittorio; Ferruccio Pisanello
T-NANO, Vol. 16, Issue 1, pp. 23 – 31, January 2017.


Abstract: Two-photon (2P) lithography shows great potential for the fabrication of three-dimensional (3-D) micro- and nanomechanical elements, for applications ranging from microelectromechanical systems to tissue engineering, by virtue of its high resolution (<;100 nm) and biocompatibility of the photosensitive resists. However, there is a considerable lack of quantitative data on mechanical properties of materials for 2P lithography and of structures obtained through this technique. In this paper, we combined static and dynamic mechanical analysis on purpose-designed microstructures (microbending of pillar-like structures and picometer-sensitive laser Doppler vibrometry of drum-like structures) to viably and nondestructively estimate Young's modulus, Poisson's ratio, and density of materials for 2P lithography. This allowed us to analyze several polymeric photoresists, including acrylates and epoxy-based materials. The experiments reveal that the 2P exposure power is a key parameter to define the stiffness of the realized structures, with hyperelasticity clearly observable for high-power polymerization. In the linear elastic regime, some of the investigated materials are characterized by a quasi-linear dependence of Young's modulus on the used exposure power, a yet unknown behavior that adds a new degree of freedom to engineer complex 3-D micro- and nanomechanical elements.

December 22nd, 2016

From the November 2016 issue of IEEE Transactions on Nanotechnology

Continuous Fabrication of Multiscale Compound Eyes Arrays With Antireflection and Hydrophobic Properties

by Linfa Peng; Chengpeng Zhang; Hao Wu; Peiyun Yi; Xinmin Lai; Jun Ni
T-NANO, Vol. 15, Issue 6, pp. 971 – 976, November 2016.

Images of the multi-scale compound eyes arrays: (a) low magnification image of multi-scale compound eyes arrays, (b) close-up image of the single microlens and its surroundings, (c) AFM image of the ordered array of tapered pillars.

Abstract: The multiscale hierarchical structures inspired by moth’s compound eyes offer multifunctional properties in optoelectronic devices. However, it is still a major challenge to fabricate these hierarchical structures on large-area substrates using a simple and cost-effective technique. The roll-to-roll ultraviolet nanoimprint lithography (R2R UV-NIL) technique provides a solution for the continuous fabrication of multiscale compound eyes arrays due to its high-speed, large-area, high-resolution, and high-throughput. In this paper, the R2R UV-NIL technique was used to fabricate the multiscale compound eyes arrays on the PET substrate. The mold used in the R2R UV-NIL process was acquired by anodic aluminum oxide process and then the multiscale compound eyes arrays were directly obtained via one-step R2R imprinting. The obtained multiscale compound eyes arrays exhibit excellent antireflective performance within the wavelength 400-800 nm. Besides, the compound eyes arrays also equip the surface of the microlens with excellent hydrophobic characteristics. These multifunctional properties enable the multiscale compound eyes arrays to retain their superior optical properties in real-time environmental conditions. This report can provide a beneficial direction for the continuous production and widespread applications of the multiscale compound eyes arrays.

October 19th, 2016

From the September 2016 issue of IEEE Transactions on Nanotechnology

Halloysite Clay Nanotubes as Carriers for Curcumin: Characterization and Application

by Chiara Dionisi ; Nemany Hanafy ; Concetta Nobile ; Maria Luisa De Giorgi ; Ross Rinaldi ; Sergio Casciaro ; Yuri M. Lvov ; Stefano Leporatti
T-NANO, Vol. 15, Issue 5, pp. 720 – 724, September 2016.


Abstract: Halloysite is a nanostructured clay mineral with hollow tubular structure, which has recently found an important role as delivery system for drugs or other active molecules. One of these is curcumin, main constituent in the rhizome of the plant Curcuma Longa, with a series of useful pharmacological activities, hindered by its poor bioavalaibility and solubility in water. In this study, Halloysite clay nanotubes (HNTs) were characterized in terms of both structure and biocompatibility and they were used for curcumin delivery to cancer cells. The performed 3-(4, 5-dimethythiazol-2-yl)-2, 5-diphenyl-tetrazolium bromide (MTT) assay showed that HNTs have a high biocompatibility, also when coated with polymers, while curcumin is highly toxic for cancer cells. The release kinetics of curcumin from HNTs was investigated by the dialysis bag method, showing a slow and constant release of the drug, which can be further controlled by adding layers of polyelectrolytes to the external surface of the tubes. Successful polymer coating was followed by Zeta potential. The Trypan Blue assay showed a cytotoxic effect of loaded HNTs, proportional to the concentration of tubes and the incubation time. Successful HNTs uptake by breast cancer cells was demonstrated by Confocal Laser Scanning Microscopy images. All results indicate that HNTs are a promising carriers for polyphenol delivery and release.

October 5th, 2016

Joint Special Section on VLSI and Nanotechnology Design Trends for Computing Innovations

IEEE Transactions on Nanotechnology and IEEE Transactions on Emerging Topics in Computing seek original manuscripts for a Special Section tentatively scheduled to appear in the September 2017 issues.
The topics of interest for this special section include:

  • VLSI Design: Design of ASICs, microprocessors/micro-architectures, embedded processors, digital systems, NoC, interconnects, memories, and FPGAs.
  • VLSI Circuits: digital circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits.
  • Low Power and Power Aware Design: Circuits, micro-architectural techniques, thermal estimation and optimization, power estimation methodologies, and CAD tools.
  • Computer-Aided Design (CAD): Hardware /software co-design, logic and behavioral synthesis, logic mapping, simulation and formal verification, layout (partitioning, placement, routing, floor planning, compaction), algorithms and complexity.
  • Testing, Reliability, Fault-Tolerance: Digital testing, design for testability and reliability, online testing techniques, static and dynamic defect- and fault-recoverability, and variation-aware design.
  • Emerging Technologies & Post-CMOS VLSI: Analysis, circuits and architectures, modeling, CAD tools and design methodologies for nanotechnologies, molecular electronics, quantum devices, biologically-inspired computing, spintronic technology, CNT, MTJ, NML, PCM, PMC, and sensor and sensor networks, etc.

Submitted articles must not have been previously published or currently submitted for journal publication elsewhere. An extended version of an article appearing in a conference proceedings (and in particular, GLSVLSI 2016) can be submitted provided that it has substantially new content w.r.t. to the original conference version. The conference paper must be cited in the main text and the cover letter must clearly describe the differences with the conference version and clearly identify the new contributions. As an author, you are responsible for understanding and adhering to the submission guidelines. Authors are invited to submit manuscripts focused on topics of computing directly to Transactions on Emerging Topics in Computing (TETC) at and papers focused on topics of nanoscale circuits and technology directly to Transactions on Nanotechnology (TNano) at Authors should be aware that papers can be published in TNano or TETC depending on the availability of space with the final allocation at the discretion of the Editor-in-Chief of the respective Transactions. Please address all correspondence regarding this Special Section to the Guest Editors (email:

Important Dates

  • Manuscript Submission: November 1, 2016.
  • First decision to authors: February 1, 2017.
  • Revision due (if necessary): April 1, 2017.
  • Final notification (acceptance/rejection): July 1, 2017.
  • Final manuscripts due: August 1, 2017.
  • Special section publication: September 2017.

Guest Editors


Laleh Behjat (University of Calgary)

Ayse Coskun (Boston University)

Jie Han (University of Alberta)

Martin Margala (University of Massachusetts Lowell)

The Call for Papers is available here

September 8th, 2016

From the September 2016 issue of IEEE Transactions on Nanotechnology

Methodology and Design of a Massively Parallel Memristive Stateful IMPLY Logic-Based Reconfigurable Architecture

by YYasunao Katayama; Toshiyuki Yamane; Daiju Nakano; Ryosho Nakane; Gouhei Tanaka
T-NANO, Vol. 15, Issue 5, pp. 762 – 769, September 2016.


Abstract: We present a framework of wave-based neuromorphic computing aiming at brain-like capabilities and efficiencies with nanoscale device integration. We take advantage of the unique nature of elastic nondissipative wave dynamics in both computations and IO communications in between as a means to natively implement and execute neuromorphic computing functions such as weighted sum in a spatiotemporal manner. Lower bound analysis based on a memory model and wave group velocity scaling is provided for conceptual evaluations.

September 8th, 2016

From the July 2016 issue of IEEE Transactions on Nanotechnology

Methodology and Design of a Massively Parallel Memristive Stateful IMPLY Logic-Based Reconfigurable Architecture

by Kamela C. Rahman; Dan Hammerstrom; Yiwei Li; Hongyan Castagnaro; Marek A. Perkowski
T-NANO, Vol. 15, Issue 4, pp. 675 – 686, July 2016.


Abstract: Continued dimensional scaling of CMOS processes is approaching fundamental limits and, therefore, alternate new devices and microarchitectures are explored to address the growing need of area scaling and performance gain. New nanotechnologies, such as memristors, emerge. Memristors can be used to perform stateful logic with nanowire crossbars, which allows for implementation of very large binary networks. This paper involves the design of a memristor-based massively parallel datapath for various applications, specifically single instruction multiple data and parallel pipelines. The innovation of our approach is that the datapath design is based on space-time diagrams that use stateful IMPLY gates built from binary memristors. The paper also develops a new model and methodology to design massively parallel memristor-CMOS hybrid datapath architectures at a system level. This methodology is based on an innovative concept of two interacting subsystems: 1) a controller composed of a memristive RAM, MsRAM, to act as a pulse generator, along with a finite-state machine realized in CMOS, a CMOS counter, CMOS multiplexers, and CMOS decoders; 2) massively parallel pipelined datapath realized with a new variant of a CMOL-like nanowire crossbar array, memristive stateful CMOL with binary stateful memristor-based IMPLY gates. In contrast to previous memristor-based FPGA, our proposed memristive stateful logic field programmable gate array uses memristors for both memory and combinational logic implementation. With a regular structure of square abutting blocks of memristive nanowire crossbars and their short connections, our architecture is highly reconfigurable. We present the design of a pipelined Euclidean distance processor along with its various applications. Euclidean distance calculation is widely used by many neural network and similar algorithms.


August 29th, 2016

Special Section/Issue on the IEEE International Conference on Nanotechnology

IEEE Transaction on Nanotechnology (TNANO) seeks original research manuscripts for a Special Section/Issue on the IEEE 2016 IEEE International Conference on Nanotechnology.

Background and Scope


Extensive research on nanotechnology materials and devices has unveiled many interesting and promising applications in electronics, photonics, biomedicine, and beyond. Encouraged by the success of the IEEE 16th International Conference on Nanotechnology (IEEE NANO 2016), IEEE Transactions on Nanotechnology (TNANO) will consider extended/revised versions of papers presented at IEEE NANO 2016. Submitted manuscripts will undergo a full peer review process.
Authors are requested to revise/expand the conference version to contain substantial new technical materials due to the restriction in duplicated publications and the competitive acceptance process.
Manuscripts for TNANO must be submitted on-line using the IEEE TNANO manuscript template and “Information for Authors”, via the IEEE Manuscript Central found at On submission to TNANO, authors should select the “Special Issue” manuscript type instead of “Regular Paper.” Manuscripts must focus on nanotechnology as reflected by technical contents and references.

Important Dates

  • Manuscript Submission: September 31, 2016
  • First decision to authors: November 31, 2016
  • Revision due (if necessary): December 30, 2016
  • Final notification (acceptance/rejection): February 15, 2017
  • Final manuscripts due: March 15, 2017
  • Special section publication: 2017

Guest Editors


Please address all other correspondence regarding this Special Issue to the Guest Editors:

Prof. Takahito Ono (Tohoku University, Japan)

Prof. Ichiro Yamashita (Nara Institute of Science and Technology, Japan)

Prof. Yming Li (National Chiao Tung University, Taiwan)

Prof. Sreeram Vaddiraju (Texas A&M University, USA)

Prof. Chang-ki Baek (Pohang University of Science and Technology, Korea)

The Call for Papers is available here